Introduction to UPF
Verification's own power-aware verification page checked whether a design's power architecture behaves correctly — static structural checks, dynamic…
Power Domains and Supplies
Every construct in this topic ultimately refers back to two foundational ideas: which logic shares power control (a power domain), and what that power…
Power States
Power Domains and Supplies established what a supply set is. This page covers what values it's actually allowed to take on — and, just as importantly…
Isolation Strategies
A domain that's powered down doesn't just stop computing — its outputs go undefined, and anything still-powered downstream of it now has an undefined…
Level Shifter Strategies
Isolation Strategies handled signals that go undefined when a domain loses power entirely. This page covers a different problem: two domains that are both…
Retention Strategies
Not every bit of state in a powered-down domain is meant to be lost. Retention preserves selected flip-flop values through a power-down cycle, using a…
Power Switches
Every strategy in this section has quietly assumed something: that a domain's supply can actually be cut and restored. The power switch is that assumption…
The Power-Up Sequence
Verification's own power-aware verification page already described the correct 4-step order from the checking side — enable power, wait for stability…
Hierarchical UPF
Every example so far described one flat set of domains in one file. A real chip is built from blocks written by different teams, sometimes different…
Example Walkthrough: PWM Power Intent
Every construct across this topic's three sections now exists on its own page. This capstone applies all of it to one real example: the PWM register block…